How Transistor Area Shrank by 1 Million Fold (Paperback)

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Description


Introduction.- Overview.- Semiconductors and Insulators.- Diodes, MOS Transistors, Bipolar Transistors, Inverters.- Building High Performance MOS Transistors.- Parasitic MOS and Bipolar Transistors.- Design Rules and Photo Patterns.- CMOS Inverter Process Flow.- Key Inventions & Developments that Enabled Scaling.- Process Flow with Histories of Scaling at Key Steps.

About the Author


Education: Ph.D. Physical Chemistry, U. of Illinois. Postdoctorate in Physics and Quantum Optics, U. of Arizona. Postgraduate courses in Solid State Physics at U. of Texas Dallas and U. of Texas Arlington. 8 years - Tigelaar Consulting, LLC. Wrote 150+ patent applications for Customer. Yield consultant to several major semiconductor companies. Technical advisor to 3 startup companies. 2 years - PDF Solutions: Senior consultant. Yield enhancement and SRAM layout. 26 years - Texas Instruments, Inc. Managed technical engineering groups. Developed manufacturing flows for next generation integrated circuits. 70+ US patents. 40+ publications in technical journals. TI Fellow. 4 years - Abbott Labs, Inc. Managed Technical Troubleshooting group that diagnosed and fixed production problems and customer problems with Abbott's diagnostic kits. 5 years - Rohm and Haas Co. Plastics Engineer, Developed production procedures for diagnostic reagents. Setup and managed the production facility for RIA diagnostic kits for Micromedic Systems, Inc., a subsidiary of Rohm and Hass Co. 1 patent. Cofounder of Testchip Technologies, LLC. Developed automated software for testchip layout.
Product Details
ISBN: 9783030400231
ISBN-10: 3030400239
Publisher: Springer
Publication Date: July 16th, 2021
Pages: 319
Language: English